FREQUENTLY ASKED QUESTIONS
GENERAL QUESTIONS
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We have support for Keil, IAR, and Eclipse
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We suggest you use the Segger J-Link Base.
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JTAG is for factory use only. SWD port must be used for debugging and programming.
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VORAGO Arm® Cortex-M0 and Arm® Cortex-M4 products have proven flight heritage on multiple missions. View a selection of flight badges from our flight heritage here.
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Linux support is available as of late 2022.
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We recommend the Cypress FM25V20A FRAM.
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We have created a MBE vs. Scrub Rate Calculator for customer use, which can be requested here.
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Yes, we have a sample project available.
Arm® Cortex®-M4 VA416XX Questions
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Either 8-bit or 16-bit. If the EBI is used for booting, a 16-bit memory is required.
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No, eFuses are programmed at final test before shipment.
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No, these should be tied to ground.
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The VA41630 contains an internal SPI memory for boot, but can also boot from the EBI.
VA41620 must have an external memory connected to either ROM SPI pins or EBI.
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No, all resets will appear as a POR.
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Yes, the internal NVM can store program code. Note that this memory is 256 kB, so the program code must fit with the boot code if not booting via EBI.
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No.
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This is highly recommended. The internal 20MHz clock is designed only to clock the device during the boot process.
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Using the PLL, these parts can be clocked at any frequency up to 100MHz.
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Yes, the 1.5V supply should be applied before or concurrently with the 3.3V supply when using external supplies.
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We have thermal data for the 176-pin ceramic package only at this time.
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The VA416xx board support package (BSP) provides sample software projects as well as peripheral firmware drivers.
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No, trimming and forming the leads of the device are the responsibility of the customer to match with their PCB requirements.